Response to IP's Growing Impact On Yield And Reliability
One of the reasons I founded SemiWiki nine years ago was the lack of EDA, IP and Foundry content in the media. The problem is that unless you work in the industry it is very difficult to write about it in competent technical detail. Most media outlets only know what vendors tell them which is how the semiconductor industry worked before social media (blogging) came into power.
This is an example, but certainly not a bad one, nothing scandalous here, definitely not DeepChip worthy. This is an email exchange in regards to IP Quality and the Fractal Crossfire product. I have known the Crossfire co-founders for 20+ years, they are a SemiWiki Sponsor, and I help them with relationships in Taiwan so I know this to be true. The majority of the top semiconductor companies, IP companies, and foundries use Crossfire collaboratively so this is worth a look, absolutely:
Recently SemiEngineering published an excellent article discussing the need for IP quality management because of its increasing importance to realize design-schedules and failure-free silicon.
Various executives from IP and EDA companies provide their views allowing us to identify the root-causes. It’s no surprise that this results in another instance of “round up the usual suspects”: increasing design complexity, enabled by advanced manufacturing technology that demands more detailed characterization and management of manufacturing variation, Add to that the needs of increasing design-reliabilty for the automotive sector – you really care more about the controllers in your self-driving vehicle then about camera management in your cell-phone- and it’s obvious design and IP-quality should be addressed from day 1 and throughout the entire design-process when starting a new SoC project.
One of the solutions called for are “IP management systems with an eye on quality“, As an addendum to the article, we’d like to point here to the solutions provided Fractal Technologies. Their Crossfire IP qualification tool and Transport format for IP-requirements allows for a clean handshake between IP designers and their customers. In the Transport format, a customer can specify IP integrity requirements that it expects from its IP suppliers. Fractal customers use Crossfire for incoming inspection on the IP releases shipped to them, using these requirements and only decide to introduce new versions in their design flow if all requirements are met.
A growing trend is to use the Transport IP-requirements as a standard to be met by IP suppliers. Thus the SoC design-team is guaranteed the IP quality they need as their suppliers now run Crossfire on the designs before shipment and attach the validation report as proof.
With the Crossfire IP qualification tool, Fractal is able to take the IP integrity verification burden away from the design-team. thus freeing up resources to deal with verifying the actual functionality of their design, not of the correctness of the sub-components.
Fractal Technologies is a privately held company with offices in San Jose, California and Eindhoven, the Netherlands. The company was founded by a small group of highly recognized EDA professionals. Fractal Technologies is dedicated to provide high quality solutions and support to enable their Customers to validate the quality of internal and external IP’s and Libraries. Thanks to our validation solutions, Fractal Technologies maximize value for its Customers either at the Sign Off stage, for incoming inspection or on a daily basis within the Design Flow process. Fractal Technologies goal is to become the de facto IP & Library Validation Solutions Provider of reference for the Semiconductors Industry, while staying independent to keep its intrinsic value by delivering comprehensive, easy to use and flexible products.
Crossfire checks consistency and validates all data formats used in designs and subsequently improves the Quality of Standard Cell Libraries, IO libraries and general-purpose IP blocks (Digital, Mixed Signal, Analog and Memories). It reports mismatches or modeling errors for Libraries and IP that can seriously delay an IC design project.
Library and IP integrity checking has become a mandatory step for a “state of the art” deep submicron design due to the following challenges:
- The sheer number of different views
- The complexity of the views (ECSM, CCST/N/P)
- The loss of valuable design time
- Time to market
Crossfire helps CAD teams and IC designers achieve high quality design data in a short time. Crossfire assures that the information represented across the various views is consistent and does not contain anomalies.