Supported Formats

Standard cell library, IO and Hard IP validation tool

Front End
Binary Database
Simulation & Schematics
Back End
Miscellaneous
• Verilog
- System Verilog
- AMS Verilog
- Verilog-HDL
- Verilog2001
- Tetramax
• Fastscan/ATPG
• CTL/STIL
• VHDL
• Liberty (.lib)
- NLDM/NLPM
- CCS(T/N/P)
- LVF (POCV)
- EM
- ECSM
- AOCVM/POCVM
• UPF
• CPF
• SDF
• MilkyWay
- CEL
- FRAM
- NET
- …
• OpenAccess
- layout
- abstract
- schematic
- symbol
- …
• NDM (ICC2)
- layout
- design
- frame
- …
• Spice
- HSpice
- CDL
- RSPF/DSPF
• Spectre
• All binary DB schematics
• GDSII
• OASIS
• LEF
• DEF
• SPEF
• Plib
• IBIS
• LVLIB
• Custom Parsers
- Slib
- IPXACT
- Ansys APL
- Any custom format can
be added using Fractal API